Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!wuarchive!gem.mps.ohio-state.edu!tut.cis.ohio-state.edu!ucbvax!mtxinu!taniwha!paul
From: paul@taniwha.UUCP (Paul Campbell)
Newsgroups: comp.arch
Subject: Re: Asynchronous cpu
Message-ID: <421@taniwha.UUCP>
Date: 5 Oct 89 08:36:58 GMT
References: <5241@dime.cs.umass.edu>
Reply-To: paul@taniwha.UUCP (Paul Campbell)
Organization: Taniwha Systems Design, Oakland
Lines: 23

In article <5241@dime.cs.umass.edu> yodaiken@freal.cs.umass.edu (victor yodaiken) writes:
>In the June 89 SIGARCH there's an article by Martin, Burns and a couple
>of other folks from CALTECH on using the self-timed (asynchronous) 
>circuits that they've been pushing at CALTECH to build a processor. 
>The paper and chip look interesting, but there's a lack of details.

I liked the bit when they put it in liquid nitrogen and got about
twice as many MIPS out of it (being self-timed it has no clocks and
only depends on internal delays to slow it down). Of course self-timed 
logic takes up more space ....

>Any comments on this work out there? Any comments on self-timed
>circuits themselves?

Read this year's Turing Address in CACM a few months back.

	Paul

-- 
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