Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ncar!unmvax!bbx!bbxsda!scott
From: scott@bbxsda.UUCP (Scott Amspoker)
Newsgroups: comp.arch
Subject: Re: Self-modifying code
Message-ID: <236@bbxsda.UUCP>
Date: 10 Oct 89 22:03:57 GMT
References: <1080@mipos3.intel.com> <48682@ricerca.UUCP>
Reply-To: scott@bbxsda.UUCP (Scott Amspoker)
Organization: Basis International,  Albuquerque, NM
Lines: 29

In article <48682@ricerca.UUCP> chase@Ozona.UUCP (David Chase) writes:
>jpoon@mipos2.intel.com (Jack Poon~) writes:
>>Could any experts out there educate me WHY and HOW does self-modifying
>>code use?

In some cases it was necessary to implement subroutines.  I used to
work on an old IBM System/3 (now *there's* a clunker).  There
was no subroutine branch instruction.  Anytime you did a normal
branch, the address of the next instruction was placed into the
"address recall register (ARR)".  The first thing the subroutine
had to do was store the ARR into the proper location of some
branch instruction that would ultimately act as a "return".
Obviously, subroutines were not re-entrant.

In fact, we had a standard convention of using the expression '*-*'
(read as: location counter minus location counter: absolute 0).
So, if you were maintaining some assembly code and enountered
an instruction such as:

    bra  *-*

You knew that the operand would be determined at runtime. 
Scary stuff, no?

-- 
Scott Amspoker
Basis International, Albuquerque, NM
(505) 345-5232
unmvax.cs.unm.edu!bbx!bbxsda!scott