Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!pt.cs.cmu.edu!sei!firth
From: firth@sei.cmu.edu (Robert Firth)
Newsgroups: comp.arch
Subject: Re: ERISC???
Message-ID: <4424@bd.sei.cmu.edu>
Date: 11 Oct 89 12:34:15 GMT
References: <16190@vail.ICO.ISC.COM>
Reply-To: firth@sei.cmu.edu (Robert Firth)
Organization: Software Engineering Institute, Pittsburgh, PA
Lines: 20

In article <16190@vail.ICO.ISC.COM> rcd@ico.ISC.COM (Dick Dunn) writes:

>This week's EE Times features a front-page article about IBM's forthcoming
>line of RISC machines based on the `America' processor, presented at ICCD.
>The article mentions that the architecture has 184 instructions!

Well, that sounds like a lot of instructions.  However, let's not
forget that RISC is as much a philosophy as a statistic; it is
still reasonable to claim a machine design has followed that
philosophy even though it has 'lots' of instructions.

>The machine won't be out until some time next year...
>Sigh...this sort of non-journalism doesn't do anyone--even IBM--any good.

Alas, I beg to differ.  We have seen this strategy before from the
dinosaurs, and it is very effective.  What three-piece-suited executive
is now going to order an R3000 or a SPARC, when in 12 months' time
(or more like 18), Big Blue is going to come out with the Real Thing?
This announcement will inhibit people from buying a new machine because
it is less risky to wait and see.