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From: pl@etana.tut.fi (Lehtinen Pertti)
Newsgroups: comp.arch
Subject: Re: Self-modifying code
Message-ID: <9175@etana.tut.fi>
Date: 11 Oct 89 15:20:35 GMT
References: <6481@pt.cs.cmu.edu>
Sender: News@tut.fi
Lines: 31

From article <6481@pt.cs.cmu.edu>, by koopman@a.gp.cs.cmu.edu (Philip Koopman):
> 
> In my case, the self-modification is limited to changing the
> addresses of subroutine call instructions.  If a RISC architecture
> 

	I've been lately wondering if there is any architecture
	with possibility to execute instruction indirectly.

	Old Intel 8080 made interrupt handling by executing
	instruction provided by peripheral, but does any
	current architecture support anything like this.

	I think this would provide a way to create 'self-modifying'
	code without crashing into cache problems.

	I mean something like:

		exec r0	; execute instructio in register r0

	or

		exec (r0)	; execute instruction pointed by r0

	Does anyone know?

--
pl@tut.fi				! All opinions expressed above are
Pertti Lehtinen				! purely offending and in subject
Tampere University of Technology	! to change without any further
Software Systems Laboratory		! notice