Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!apple!gem.mps.ohio-state.edu!ginosko!uunet!mfci!colwell From: colwell@mfci.UUCP (Robert Colwell) Newsgroups: comp.arch Subject: Re: Self-modifying code Message-ID: <1078@m3.mfci.UUCP> Date: 12 Oct 89 23:51:08 GMT Sender: colwell@mfci.UUCP Reply-To: colwell@mfci.UUCP (Robert Colwell) Organization: Multiflow Computer Inc., Branford Ct. 06405 Lines: 55 >You vendors of custom processors has better take note of this statement. It >is really amusing to see the Multiflow and Alliant fellows bragging at how >well they are doing when single chip microprocessors run circles around their >entire multiprocessor complexes. The SUN-4 Sparcstation which did all this I used to design micros, and I used to design workstations, too. What they're capable of now, and where they're going in the performance space, isn't the constant source of surprise you imply. I have yet to brag about anything here. This is comp.arch, not comp.marketing. Marketing and market success are peripheral issues which I have no interest in pursuing in this forum. Or do you think that you have to make a lot of money off something before it can be considered technically important? What interests me is building fast computers. To that end, Multiflow has contributed something original and innovative, and as far as I can tell, multiple-instruction issue is a path that seems to be gaining adherents, especially among the very micros I'm supposed to be terrified of. From a comp.arch point of view I think that's neat. >"damage" is an absolute DOG compared to the most recent Sparc, MIPS, or i860 >chip sets. No doubt a real terror from Motorola is not far away. The lifetime >of custom processors, even processors like the Cray line, are real short. >Imagine the surprise of CRI executives when they realize that they are no >longer losing market share to the Japanese super computer companies, and are >now losing market share to microprocessors. We are watching this happen >internally at LLNL and do not doubt that it is happening elsewhere. >There is no defense against the ATTACK OF THE KILLER MICROS! We've been through this before. When micros want to supplant the high-end supers, they'll have to come up with answers to the age-old (well, ok, maybe 15 years old) problem of how to build a memory that will keep a fast CPU fed. Such a memory costs a Whole Lot Of Money. When you've sunk a lot of money into that memory, you can afford more CPU than you can buy off the shelf. There *is* some question about how fast one can turn out specialized processors vs. how fast the micro guys can crank them out. (It's clear who's winning that race for certain data points such as Cray vs. Moto/Intel, though.) But you do have a point (whether it's the one you intended, I don't know). If LLNL personnel are getting their work done on workstations, maybe the market for true supercomputer performance (for which you need the kind of memory and I/O bandwidth I referred to above) isn't as big as people have always thought it was. Or their workloads have migrated away from the canonical vector codes to codes that no longer show off the big supers to their best advantage? If either of these is true, then you're right, this presages a major shift in what hardware people buy. Bob Colwell ..!uunet!mfci!colwell Multiflow Computer or colwell@multiflow.com 31 Business Park Dr. Branford, CT 06405 203-488-6090