Xref: utzoo comp.dcom.modems:4645 sci.electronics:8191 Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!gem.mps.ohio-state.edu!apple!sun-barr!decwrl!jumbo!murray From: murray@jumbo.dec.com (Hal Murray) Newsgroups: comp.dcom.modems,sci.electronics Subject: Re: SW56/ISDN for Macintoshes?? Summary: software limit is ~50K bits/sec hardware limit is under 1 megabit/sec Keywords: 56KB, ISDN Message-ID: <14120@jumbo.dec.com> Date: 12 Oct 89 03:49:35 GMT References: <1989Sep29.114152.4344@ux1.cso.uiuc.edu> <2439@ucsfcca.ucsf.edu> Organization: DEC Systems Research Center, Palo Alto Lines: 25 There are two limits that I know about for the Mac serial ports: software and hardware. If you use the standard driver, the interrupt overhead limits you to ~50K bits/second total throughput on all active lines. I think that's in the hardware book. I have a hack test program that could mostly keep up in send-only at 56K. When sending and also receiving what it was sending (via a paper clip in back) it only got 30K even though the hardware was still running at 56K. The trick for going faster than that is to poll rather than take an interrupt on each character. That's how AppleTalk does it. I can get 400K bits/sec using code written in LSP. (Disable interrupts to avoid missing characters.) I think you could poll over 1 megabit/second, but the SCC won't go that fast, even with external clocking. New data sheets contain an abscure footnote that limits the data rate to 1/4 of pClk. PClk is nominally 3.672MHz so you might get 900KHz. 3.672MHz is slightly less than 1/2 of the Mac processor clock (7.8336 MHz), so something fishy is going on. I've seen slight jitter on a scope when watching a single bit produced from the internal clock. I assume somebody is stretching cycles for memory refresh or display or... I don't know what the actual limit is, but I'll bet it's below 3.672MHz/4.