Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!mailrus!wuarchive!brutus.cs.uiuc.edu!ginosko!uunet!ibmpa!bass.tcspa.ibm.com!webb From: webb@bass.tcspa.ibm.com (Bill Webb) Newsgroups: comp.sys.ibm.pc.rt Subject: Re: integer alignment problems on RT Keywords: RT 6150 032 ROMP alignment Message-ID: <2489@ibmpa.UUCP> Date: 9 Oct 89 18:44:45 GMT References: <14927@bloom-beacon.MIT.EDU> <162@eliza.edvvie.at> <2396@ibmpa.UUCP> Sender: news@ibmpa.UUCP Organization: IBM AWD Paloalto Lines: 23 > /* > * determine the processor model (either SGP or ROMPC) by setting > * the Interrupt On Unaligned Access bit which is always 0 on the SGP > * processor. > */ > This is the only reference anywhere I have seen to the bit in question. > The technical reference describes this bit as "reserved -- must be 0". > Someday I'll try setting this bit to see what happens. > --John Carr (jfc@athena.mit.edu) Please do NOT set this bit while a program that might do unaligned accesses is running - this function does NOT work as you might expect and and will probably result in a system crash or a processor lockup. It is best to treat this bit as the tech ref says "reserved -- must be 0". I guess I should have deleted that somewhat misleading comment before we shipped the code. At the time the comment was written it was expected that the bit would be fully functional, and it wasn't revised later when it wasn't. That's one hazard of supplying system sources - people dig into them and find obscure references and publish them to the world! ---------------------------------------------------------------- The above views are my own, not necessarily those of my employer. Bill Webb (IBM AWD Palo Alto), (415) 855-4457). UUCP: ...!uunet!ibmsupt!webb