Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cs.utexas.edu!ginosko!gem.mps.ohio-state.edu!apple!sun-barr!decwrl!jumbo!ehs From: ehs@jumbo.dec.com (Ed Satterthwaite) Newsgroups: comp.sys.m68k Subject: Re: What's the difference between the MC68661 and the MC68681? Message-ID: <14121@jumbo.dec.com> Date: 12 Oct 89 04:43:15 GMT References: <6735@hubcap.clemson.edu> <9306@pyr.gatech.EDU> Organization: DEC Systems Research Center, Palo Alto Lines: 23 In article <9306@pyr.gatech.EDU>, byron@pyr.gatech.EDU (Byron A Jeff) writes: ... > > One caveat from the first time I used it: you must let it generate it's > DTACK in it's own good time. I put it in a 68008 test board that had > a grounded DTACK and the 68681 screwed up it's read FIFOs (4 byte > FIFO) when it didn't get it's DTACK. > Just so if you're running the 68681 on an asynchronous bus, which is what the original poster wanted. But you don't have to wait for DTACK if you are running the '681 synchronously. Maybe everyone knows that, but the data booklet didn't make it entirely obvious to me. The footnotes do let you calculate how long to wait. If I recall correctly, two wait states worked fine for me in a 12.5 MHz system. I believe the bus cycle actually goes somewhat faster in this mode -- DTACK generation is done with the timing of the '681's clock and costs an extra synchronization delay inside the chip. Ed Satterthwaite ehs@src.dec.com {...}!decwrl!ehs