Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!gem.mps.ohio-state.edu!ginosko!uunet!cbmvax!daveh
From: daveh@cbmvax.UUCP (Dave Haynie)
Newsgroups: comp.sys.mac
Subject: Re: Mac IIci SIMMs
Message-ID: <8130@cbmvax.UUCP>
Date: 10 Oct 89 00:23:16 GMT
References: <35341@apple.Apple.COM>
Organization: Commodore Technology, West Chester, PA
Lines: 47

>What are "fast page mode" SIMMs and how are they different from
>"normal" SIMMs?  Is one obligated to use only these special SIMMs
>in the IIci?  More importantly, can one
>obtain these from the vendors who advertise in MacWeek for
>the same prices as "normal" SIMMs???

"Fast-Page" is one particular special DRAM mode, and these days by far
the most common.

Set the way-back machine for about the mid 80s or so.  Back then, most
DRAM had a special mode called "page" mode.  Normally, a DRAM requires
two address cycles, a row address, supplying 1/2 the address information,
followed by a column address, supplying the other 1/2 of the address.
They figured if they allowed the row address to stay latched in the part,
multiple column addresses could be supplied to access all the memory in
that "page".  And since you now only had to wait that column access time,
not the row access time, accesses to a page could be much faster.

Only, originally they weren't that much faster.  Then they started to see
how useful such a mode could be, and specificially work on cutting down the
column access time.  Now you have fast-page mode, which gives you a normal
row access time but a relatively fast column access time.  Nearly every
1 megabit density DRAM with page mode has fast-page mode, but a few of the
early ones (usually NMOS rather than CMOS) didn't.  I don't know just what
they've packaged on SIMMs these days.

The other thing to watch for are the other types of DRAM.  Along the way,
two other fast access modes were invented.  Static Column mode works much
like fast-page mode, only the column addresses aren't latched, they work
much more like the addresses presented to static RAMs.  This is nice if
you're designing with that in mind, since you don't have to worry about 
supplying an exact CAS signal, but if your addresses don't remain valid for
the whole memory cycle, this can be a problem.  The other speedup mechanism
is called nybble mode.  Here, you get 4 bits available internally from each
DRAM, and they are shifted out in a rotating order, but much faster than
for SC RAMs or FP RAMs.  Interestingly, the nybble mode RAM exactly matches
the way '030 burst mode works; the only problem is size -- for a 32 bit bus,
you need a minimum of 4 megabytes of RAM using nybble mode parts (they're
only in 1 bit wide configurations).  Both nybble and SCRAMs are available
in SIMM packages, but you _usually_ have to ask for them, and SCRAMs can 
cause problems in systems that count on a latched column address.

>         Mark
-- 
Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests"
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                    Too much of everything is just enough