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From: lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay)
Newsgroups: comp.arch
Subject: Re: ATTACK OF KILLER MICROS
Message-ID: <6523@pt.cs.cmu.edu>
Date: 15 Oct 89 03:26:48 GMT
References: <35825@lll-winken.LLNL.GOV> <2121@brazos.Rice.edu>
Organization: Carnegie-Mellon University, CS/RI
Lines: 22

Gordon Bell, in the September CACM (p.1095) says, "By the end of
1989, the performance of the RISC, one-chip microprocessor should
surpass and remain ahead of any available minicomputer or mainframe
for nearly every significant benchmark and computational workload.
By using ECL gate arrays, it is relatively easy to build processors
that operate at 200 MHz (5 ns. clock) by 1990." (For those who don't
know, Mr. Bell has his name on the PDP-11, the VAX, and the Ardent
workstation.)

The big iron is fighting back, and that involves reducing their chip
count.  Once, a big cpu took ~10^4 chips: now it's more like 10^2.  I
expect it will shortly be ~10 chips. Shorter paths, you know.

I see the hot micros and the big iron meeting in the middle.  What
will distinguish their processors? Mainly, there will be cheap
systems. And then, there will be expensive ones, with liquid cooling,
superdense packaging, mongo buses, bad yield, all that stuff.  Even
when no multichip processors remain, there will still be $1K systems
and $10M systems. Of course, there is no chance that the $10M system
will be uniprocessor.
-- 
Don		D.C.Lindsay 	Carnegie Mellon Computer Science