Xref: utzoo comp.arch:11805 comp.sys.ibm.pc.rt:1092
Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!mcnc!rti!xyzzy!tiktok!meissner
From: meissner@tiktok.dg.com (Michael Meissner)
Newsgroups: comp.arch,comp.sys.ibm.pc.rt
Subject: Re: Result of RT integer alignment problem / other CPU's
Keywords: CPU RT ROMP alignment
Message-ID: <1855@xyzzy.UUCP>
Date: 15 Oct 89 17:43:30 GMT
References: <170@eliza.edvvie.at>
Sender: usenet@xyzzy.UUCP
Reply-To: meissner@tiktok.UUCP (Michael Meissner)
Organization: Data General (Languages @ Research Triangle Park, NC.)
Lines: 15

In article <170@eliza.edvvie.at> johnny@edvvie.at (Johann Schweigl) writes:
| Got a lot of reactions on this topic, so I decided to post a summary
| of other CPU's behaviour to the net. Thanks to everyone who provided this 
| information.
| 
| CPU		Action on unaligned access
| ---------------------------------------------------------------------------
	...
| 88000		trap

Actually, the 88000 will either trap or round the address down to the
desired alignment, depending on whether the MXM bit is set in the PSR.

Michael Meissner, Data General.				If compiles where much
Uucp:		...!mcnc!rti!xyzzy!meissner		faster, when would we
Internet:	meissner@dg-rtp.DG.COM			have time for netnews?