Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uakari.primate.wisc.edu!brutus.cs.uiuc.edu!psuvax1!rutgers!gatech!hubcap!rchampe From: rchampe@hubcap.clemson.edu (Richard Champeaux) Newsgroups: comp.arch Subject: 1Meg DRAM supply voltage Message-ID: <6797@hubcap.clemson.edu> Date: 17 Oct 89 02:09:50 GMT Organization: Clemson University, Clemson, SC Lines: 9 I remember a while ago when they were developing 1 Meg DRAMS, they said that they had to be run off of 3.3v supplies to reduce power dissapation. Looking in a TI databook, I notice that TI's 1 Meg DRAMS (TMS4C1024) use a 5v supply and have TTL compatable inputs/outputs. My guess is that they run the I/O buffers off of the 5v supply and have a 3.3v regulator inside for the rest of the chip. My question is, are all 1 Meg DRAMS like this? Thanks for any help. Rich Champeaux (rchampe@hubcap.clemson.edu)