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From: andrew@dtg.nsc.com (Lord Snooty @ The Giant Poisoned Electric Head       )
Newsgroups: comp.arch
Subject: shared memory vs. bus master DMA on AT Bus
Keywords: tradeoffs
Message-ID: <175@berlioz.nsc.com>
Date: 10 Oct 89 00:31:37 GMT
Organization: National Semiconductor, Santa Clara
Lines: 9

Could someone come up with a list of pros and cons for this topic?
In which direction does a fast cached 386 push the decision?

I read conflicting opinions on this tradeoff nearly weekly in the trade
press; it depends on who's hawking which product, it seems.
-- 
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Andrew Palfreyman		and the 'q' is silent,
andrew@dtg.nsc.com		as in banana			 time sucks