Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cs.utexas.edu!uunet!zephyr.ens.tek.com!tektronix!sequent!mntgfx!mbutts From: mbutts@mentor.com (Mike Butts) Newsgroups: comp.arch Subject: Re: parallel systems Message-ID: <1989Oct20.165407.5887@mentor.com> Date: 20 Oct 89 16:54:07 GMT References: <10164@encore.Encore.COM> Organization: engr Lines: 49 From article <10164@encore.Encore.COM>, by jdarcy@multimax.UUCP (Jeff d'Arcy): > From article <7651@bunny.GTE.COM>, by hhd0@GTE.COM (Horace Dediu): >> Who cares about shared memory? Distributed is the only way to scale. > > I'd like to see you back this one up with some *real* proof. I could > possibly agree with the statement that distributed is the *best* way > to scale, or that distribution is necessary for *large* (>~30) scale > multiprocessing. I think that shared memory architectures will still > be viable for a long time, perhaps as a component of a distributed > environment. If you disagree please provide reaasons. Distributed architectures are obviously most desirable from a hardware point of view, because they are simple and (nearly) arbitrarily scalable. IMHO there are two reasons why shared memory architectures will continue to be more important for many of us for a long time to come. 1) Shared memory systems are *much* easier to program, and software development costs *much* more than hardware nowadays. I say this based on my experience as a hardware engineer in a mostly software engineering environment. 2) Many problems have proven inefficient so far on distributed memory architectures. Distributed machines succeed beautifully on problems where some real physical space can be mapped onto processor/memory nodes which are arranged in a regular topology which is similar to the topology of the problem. Modeling physical media, such as solids, liquids or gases, takes advantage of the fact that the state of one parcel only directly affects the state of its nearby neighbors. Problems with irregular topology, such as electronic circuits, are very much harder to solve efficiently, because the state of one gate or transistor may affect the state of another at a great distance. Communications is far more irregular and expensive, so speedups suffer. Static load balancing among the processors is also much harder. Shared architectures need not statically partition the problem, and communication speed depends much less on distance. I'm aware of new algorithmic technology being developed to attack these problems, such as distributed time discrete event simulation techniques, but there's still a lot of work ahead. I agree that distributed memory is the only way to scale if you can, but there are important problems which are much more readily solved on shared architectures, at least so far. A hybrid architecture, with physically distributed but logically shared memory, of which several examples have been built, may be the best transition path. -- Michael Butts, Research Engineer KC7IT 503-626-1302 Mentor Graphics Corp., 8500 SW Creekside Place, Beaverton, OR 97005 !{sequent,tessi,apollo}!mntgfx!mbutts mbutts@pdx.MENTOR.COM Opinions are my own, not necessarily those of Mentor Graphics Corp.