Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uakari.primate.wisc.edu!ames!amdahl!pyramid!amdcad!sun!imagen!atari!portal!cup.portal.com!Tim_CDC_Roberts From: Tim_CDC_Roberts@cup.portal.com Newsgroups: comp.lang.c Subject: Re: Bug? Message-ID: <23185@cup.portal.com> Date: 19 Oct 89 19:57:35 GMT References: <10895@riks.csl.sony.co.jp> <718@lakart.UUCP> Distribution: usa Organization: The Portal System (TM) Lines: 22 > Regarding (a-b) == 0 && (a != b), would ones complement users like > to comment? On the CDC Cyber 70/170s, which are ones complement machines, +0 is represented by 60 zero bits, and -0 is represented by 60 one bits. The machine hardware compensates in most cases, and it is impossible to generate a -0 result to any arithmetic operation with the single exception of (-0) - (-0), which produces -0. So: a = +0, b = -0: a - b = +0 and a != b. The register compare instructions, however, recognize both +0 and -0 as zero. (That is, "jump if zero" jumps in both cases). The only place that one tends to get bit with this kind of anomaly is in performing Boolean operations. In that case, it is possible to generate a result in which a register contains non-zero bits and still compares as zero. Thus, in assembly programming where this is apt to occur, one tends to test for NG (negative) as well as ZR (zero). Tim_CDC_Roberts@cup.portal.com | Control Data... ...!sun!portal!cup.portal.com!tim_cdc_roberts | ...or it will control you.