Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ames!vsi1!wyse!mips!mark
From: mark@mips.COM (Mark G. Johnson)
Newsgroups: comp.lsi
Subject: Re: On-Line Detection
Message-ID: <29736@obiwan.mips.COM>
Date: 19 Oct 89 15:12:28 GMT
References: <35374@srcsip.UUCP>
Reply-To: mark@mips.COM (Mark G. Johnson)
Organization: MIPS Computer Systems, Sunnyvale, CA
Lines: 17

In article <35374@srcsip.UUCP> vestal@SRC.Honeywell.COM (Steve Vestal) writes:
>I'm trying to learn a little more about what I've seen called on-line or
>concurrent fault/error detection; e.g., the use of parity, ECC, M of N
>voting, etc. within circuits to detect faults/errors.  I'm more interested
>in detection than masking/correction, and I'm particularly interested in
>implementation complexity/overhead and modeling issues like fault latency,
>coverage, etc.
>


T. Rao and E. Fujiwara, "Error-Control Coding for Computer Systems",
Prentice-Hall, Copyright 1989, ISBN 0-13-283953-9.  7.0 x 9.5 inches,
524 pages.  (I paid $45 for it at a nondiscount bookstore).
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
	(408) 991-0208    mark@mips.com  {or ...!decwrl!mips!mark}