Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cs.utexas.edu!uunet!pdn!larry From: larry@pdn.paradyne.com (Larry Swift) Newsgroups: comp.protocols.iso Subject: Re: TP0-4 question (novice level) Keywords: TP Message-ID: <6670@pdn.paradyne.com> Date: 18 Oct 89 12:54:08 GMT References: <2549@hub.UUCP> <1989Oct16.173618.25068@agate.berkeley.edu> <46993@bbn.COM> Sender: usenet@pdn.paradyne.com Reply-To: larry@pdn.paradyne.com (Larry Swift) Organization: AT&T Paradyne, Largo, Florida Lines: 23 In article <1989Oct16.173618.25068@agate.berkeley.edu> cliff@violet.berkeley.edu (Cliff Frost) writes: >If you have two ES's connected with X.25, what cost would TP4 add if >you used it in place of TP0? Wouldn't header prediction algorithms work >100% of the time in that case? So, the extra cost would be the >checksumming and some timer maintanence. But, Van Jacobson originally, >and now a whole host of other folks have shown that this processing is >NOT a bottleneck if your transport is properly implemented (and they've >also shown how to implement it). In article <46993@bbn.COM> mckenzie@labs-n.bbn.com (Alex McKenzie) writes: >The cost people were trying to avoid is coding (and memory space) cost, >not execution cost. I won't argue whether or not people should have Both of you seem to be saying that the TP4 flow control (over X.25's) doesn't contribute a performance hit over a single L4 & L3 connection. Since I have heard of contrary experiences, can you explain? In particular, what are "header prediction algorithms"? Larry Swift larry@pdn.paradyne.com AT&T Paradyne, LG-132 Phone: (813) 530-8605 8545 - 126th Avenue, North Largo, FL, 34649-2826 She's old and she's creaky, but she holds!