Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!boulder!grunwald
From: grunwald@foobar.colorado.edu (Dirk Grunwald)
Newsgroups: gnu.gcc.bug
Subject: fix for mips.md
Message-ID: <12833@boulder.Colorado.EDU>
Date: 16 Oct 89 19:28:20 GMT
Sender: news@boulder.Colorado.EDU
Reply-To: grunwald@foobar.colorado.edu
Distribution: gnu
Organization: University of Colorado at Boulder
Lines: 85


The following patches to the 1.36 mips.md file fixes missing pattern
when compiling:

foo(int i, float f)
{
	return(i + f)
}

Looks like it generates the right code too. This modification was
originally done either my Mark Linton at stanford or Tiemann at the
request of Linton. Linton has been using it for some time, he says.

*** /tmp/,RCSt1a03341	Mon Oct 16 12:59:56 1989
--- mips.md	Mon Oct 16 11:12:17 1989
***************
*** 1272,1285 ****
  }")
  
  (define_insn "movsf"
!   [(set (match_operand:SF 0 "general_operand" "=f,f,m,f")
! 	(match_operand:SF 1 "general_operand" "f,m,f,F"))
     (clobber (reg:SI 24))]
    ""
    "*
  {
    if (GET_CODE (operands[0]) == REG && GET_CODE (operands[1]) == REG)
!     return \"mov.s %0,%1\\t#movsf %1 -> %0 \";
  
    if (GET_CODE (operands[0]) == REG
        && GET_CODE (operands[1]) == CONST_DOUBLE)
--- 1272,1295 ----
  }")
  
  (define_insn "movsf"
!   [(set (match_operand:SF 0 "general_operand" "=f,rf,m,f,!rf")
! 	(match_operand:SF 1 "general_operand" "f,m,rf,F,rf"))
     (clobber (reg:SI 24))]
    ""
    "*
  {
    if (GET_CODE (operands[0]) == REG && GET_CODE (operands[1]) == REG)
!     {
!       if (REGNO (operands[0]) >= 32)
! 	{
! 	  if (REGNO (operands[1]) >= 32)
! 	    return \"mov.s %0,%1\\t#movsf %1 -> %0 \";
! 	  return \"mfc1 %1,%0\";
! 	}
!       if (REGNO (operands[1]) >= 32)
! 	return \"mfc1 %0,%1\";
!       return \"add%: %0,$0,%1\";
!     }
  
    if (GET_CODE (operands[0]) == REG
        && GET_CODE (operands[1]) == CONST_DOUBLE)
***************
*** 1313,1321 ****
     ** bits correctly
     */
    else if (GET_CODE (operands[0]) == REG)
!     return \"l.s\\t %0,%1\\t#movsf %1 -> %0\";
    else
!     return \"s.s\\t %1,%0\\t#movsf %1 -> %0\";
  }")
  
  ;; ---
--- 1323,1339 ----
     ** bits correctly
     */
    else if (GET_CODE (operands[0]) == REG)
!     {
!       if (REGNO (operands[0]) < 32)
! 	return \"lw\\t %0,%1\\t#movsf %1 -> %0\";
!       return \"l.s\\t %0,%1\\t#movsf %1 -> %0\";
!     }
    else
!     {
!       if (REGNO (operands[1]) < 32)
! 	return \"sw\\t %1,%0\\t#movsf %1 -> %0\";
!       return \"s.s\\t %1,%0\\t#movsf %1 -> %0\";
!     }
  }")
  
  ;; ---