Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!uwm.edu!uakari.primate.wisc.edu!ginosko!uunet!mcsun!sunic!sics.se!sics.se!tege
From: tege@sics.se (Torbj|rn Granlund)
Newsgroups: gnu.gcc.bug
Subject: Fix for: bug in gcc-1.36 for pyramid.
Message-ID: <TEGE.89Oct21235833@echnaton.sics.se>
Date: 21 Oct 89 22:58:33 GMT
References: <8910211251.AAdraken25184@nada.kth.se>
Sender: news@sics.se
Distribution: gnu
Organization: Swedish Institute of Computer Science, Kista
Lines: 78
In-Reply-To: bg@NADA.KTH.SE's message of 21 Oct 89 12:51:08 GMT


    x(p)
	 char *p;
    {
      return ((p[0] & ~' ') == (p[1] & ~' '));
    }

Code like this used to generate a subreg expression which was not
handled correctly.  This has been fixed in my current version by
adding a

  "(GET_CODE (operands[0]) != GET_CODE (operands[1]))"

rejection test to the recognition patterns for compare HI and QI, in
order to avoid constraint problems if the register-register case
arises, and allowing SUBREG where REG is allowed in extend_and_branch.

Please apply these patches.  Ignore any line offsets, caused by
additional changes in my sources.

*** aux-output.c~	Sat Oct 21 05:41:36 1989
- --- aux-output.c	Sat Oct 21 23:44:41 1989
***************
*** 330,336 ****
  	  op1 = extend_const (op1, extop, GET_MODE (op0), SImode);
  	  op0 = ensure_extended (op0, extop);
  	}
!       else if (code0 == REG && code1 == REG)
  	{
  	  /* I could do this case without extension, by using the virtual
  	     register address (but that would lose for global regs).  */
- --- 330,337 ----
  	  op1 = extend_const (op1, extop, GET_MODE (op0), SImode);
  	  op0 = ensure_extended (op0, extop);
  	}
!       else if ((code0 == REG || code0 == SUBREG)
! 	       && (code1 == REG || code1 == SUBREG))
  	{
  	  /* I could do this case without extension, by using the virtual
  	     register address (but that would lose for global regs).  */
*** md~	Sat Oct 21 03:27:36 1989
- --- md	Sat Oct 21 23:31:44 1989
***************
*** 188,194 ****
    [(set (cc0)
  	(compare (match_operand:HI 0 "nonimmediate_operand" "r,m")
  		 (match_operand:HI 1 "nonimmediate_operand" "m,r")))]
!   ""
    "*
  {
    rtx br_insn = NEXT_INSN (insn);
- --- 188,194 ----
    [(set (cc0)
  	(compare (match_operand:HI 0 "nonimmediate_operand" "r,m")
  		 (match_operand:HI 1 "nonimmediate_operand" "m,r")))]
!   "(GET_CODE (operands[0]) != GET_CODE (operands[1]))"
    "*
  {
    rtx br_insn = NEXT_INSN (insn);
***************
*** 260,266 ****
    [(set (cc0)
  	(compare (match_operand:QI 0 "nonimmediate_operand" "r,m")
  		 (match_operand:QI 1 "nonimmediate_operand" "m,r")))]
!   ""
    "*
  {
    rtx br_insn = NEXT_INSN (insn);
- --- 260,266 ----
    [(set (cc0)
  	(compare (match_operand:QI 0 "nonimmediate_operand" "r,m")
  		 (match_operand:QI 1 "nonimmediate_operand" "m,r")))]
!   "(GET_CODE (operands[0]) != GET_CODE (operands[1]))"
    "*
  {
    rtx br_insn = NEXT_INSN (insn);

------- End of Blind-Carbon-Copy