Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!wuarchive!wugate!uunet!portal!cup.portal.com!mmm
From: mmm@cup.portal.com (Mark Robert Thorson)
Newsgroups: sci.electronics
Subject: Re: OTP (really?) EPROMS
Message-ID: <23127@cup.portal.com>
Date: 15 Oct 89 20:34:52 GMT
References: <841@dms.UUCP> <15357@vlsisj.VLSI.COM>
Distribution: usa
Organization: The Portal System (TM)
Lines: 8

davidc@vlsisj.VLSI.COM (David Chapman) says:

> You'd better believe they test the whole thing with wafer probing.  No
> semiconductor company worth its salt would ship partially-tested chips.

That's true when such testing is possible.  FPLA's and PAL's, however, must
be shipped with only partial testing because the fusemap can't be tested
without burning it.