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From: mdeale@cosmos.acs.calpoly.edu (Myron Deale)
Newsgroups: comp.arch
Subject: i960CA
Message-ID: <1989Oct24.092403.19585@polyslo.CalPoly.EDU>
Date: 24 Oct 89 09:24:03 GMT
Sender: news@polyslo.CalPoly.EDU (News Guru)
Reply-To: mdeale@cosmos.acs.calpoly.edu (Myron Deale)
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Organization: ACS, Cal Poly, San Luis
Lines: 14


   I don't have the data sheet on the i960CA yet and wanted to ask a few
questions anyway.

   What is the power dissipation for a 33MHz part?   does the CA seem to
require a lot of extra chips?

   The articles I've read have been mildly confusing. Is the inst. cache
1KByte or 1KWord (4KB) ?   two-way set assoc w/ a 4-word line?  and what
of the data side and this "variable" stuff?


-Myron
// mdeale@cosmos.acs.calpoly.edu