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From: scarter@gryphon.COM (Scott Carter)
Newsgroups: comp.arch
Subject: Re: specmarks
Message-ID: <21569@gryphon.COM>
Date: 28 Oct 89 02:01:39 GMT
References: <327@ssp1.idca.tds.philips.nl> <4420015@hpihoah.HP.COM>
Reply-To: scarter@gryphon.COM (Scott Carter)
Organization: McDonnell Douglas Electronic Systems, Huntington Beach, CA
Lines: 31

In article <4420015@hpihoah.HP.COM> fotland@hpihoah.HP.COM (David Fotland) writes:
>
>You could define an architectural figure of merit as Specmark/Clock freq.

Indeed, this can be a useful value WITHIN "similar" architectures.
>
>Prism:	.80
>MIPS:	.56-.67
>HP-PA:	.63
>SPARC:	.45
>88100:	.39-41
>68030:	.09
>
>
>This seems to clearly show the advantage of RISC over 68K type machines.  I
>think it also seems to show the disadvantage of register windows, since
>PRISM, MIPS, and PA don't have them and SPARC and 88K have them.
>
>David Fotland
Of course, the 88K does NOT have register windows.  What it does have is
a unified register file, with only two 32-bit read ports and one write port.
This can be killer on double-precision FP, even though the FP mult pipe has
first priority for writeback slots.  IMHO:  unified register files are a
bad idea if you're going to be doing lots of DP.  I wonder how the tradeoff
would have gone to devote less die area to the multiplier (which is used on
integer as well) to provide a small FP register file?

The Prism has a high FOM because of split instruction mode, which none of the
other processors in this list have.  Wonder how the i860 will do?

Scott Carter