Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!wuarchive!udel!rochester!rit!ultb!lmb7421
From: lmb7421@ultb.UUCP (L.M. Barstow)
Newsgroups: comp.sys.apple
Subject: Re: Apple's committment to the // line
Message-ID: <1503@ultb.UUCP>
Date: 29 Oct 89 21:48:34 GMT
References: <8910161138.AA10844@trout.nosc.mil> <11322@smoke.BRL.MIL> <8192@microsoft.UUCP> <11434@smoke.BRL.MIL>
Reply-To: lmb7421@ultb.UUCP (L.M. Barstow)
Organization: Wandering Damage, Cosmo Police, Psi division
Lines: 33

In article <11434@smoke.BRL.MIL> gwyn@brl.arpa (Doug Gwyn) writes:
>In article <8192@microsoft.UUCP> brianw@microsoft.UUCP (Brian Willoughby) writes:
>In fact, I happen to think the 6502/65816 architecture is not really
>better than the 8086 family's.  It is page-oriented, uses absolute
>page 0 for special purposes, has only one register that really
>qualifies as "general-purpose" (although you can't index with it),
>and has a wildly nonorthogonal coupling between opcodes and addressing
>modes.

Yeah, it's page-oriented (oh, well...can't have everything)...page/bank
0 may be used normally just like any other section of memory - it merely
has a seperate opcode in addition to the normal ones - direct, which
allows for even faster access.  As for registers, the single-register
(actually about 3 useable ones, with limits) CPU is an old concept and
could use some revamping...maybe Bill Mensch could figure out a new set
of opcodes to deal with more registers...

Actually, the opcode->addressing mode organization is wonderful - do a
bit decomposition on the opcodes - you'll be surprised...every
addressing mode has the same last 5-bit extension across opcodes...
It may not look nice when you're trying to figure out which opcodes are
which, but it's great for interpretation inside the CPU...

>I own a IIGS, but not because I think it's a great CPU design.

It may not be the best CPU ever designed, but it certainly isn't the
worst...

-- 
Les Barstow                              **All of the paths work!!!!**
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