Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!cs.utexas.edu!uunet!cbmvax!daveh
From: daveh@cbmvax.UUCP (Dave Haynie)
Newsgroups: comp.sys.amiga
Subject: Re: 68030 Accelerators, Info Wanted
Message-ID: <8389@cbmvax.UUCP>
Date: 2 Nov 89 16:19:17 GMT
References: <14405@well.UUCP>
Organization: Commodore Technology, West Chester, PA
Lines: 30

in article <14405@well.UUCP>, theobaby@well.UUCP (Paul Theodoropoulos) says:

> Dave, true - no 030 comparisons published yet....i mistakenly pointed to data
> from 020  board performance comparisons previously published, which did in fact
> show the Ronin board to be somewhat superior in performance. mea culpa.

Yup.  The Ronin memory for their '020 board runs 1 wait-state faster than the
A2620 memory, due to the A2620's MMU.  Clock speeds were the same.

>    I do not see that address translation will incur any performance penalty
> worth mentioning. 

Yeah, like I said, the only performance hit at all is an ATC miss.  Nothing you're
likely to be able to measure, but if you're counting every cycle, it is a performance
hit.  Microcoded tree walks certainly are a good idea.

> The 030 supports 2 clk cycle accesses to physical address space, while addresses 
> are translated in parallel with D and I cache accesses, if they are in the ATC.

I though that was impressive, but of course, with the logical caches, you either
need a translation or a cache hit, never both.  The '040 has physical caches and
still manages to run without a slowdown.  Of course, in both cases, you can
identify the cache line without any translations, since the cache size is always 
smaller than the MMU's page size.

>>>>>Pummel bandwidth wasting signatures!! Paul Theodoropoulos, theobaby@Well<<<
-- 
Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests"
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                    Too much of everything is just enough