Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!cs.utexas.edu!uunet!dg!rec
From: rec@dg.dg.com (Robert Cousins)
Newsgroups: comp.arch
Subject: Re: RISC multiprocessors
Keywords: RISC,multiprocessors,parallel
Message-ID: <231@dg.dg.com>
Date: 10 Nov 89 13:47:23 GMT
References: <13319@pur-ee.UUCP> <16411@netnews.upenn.edu> <1015@maxim.erbe.se> <1989Nov8.185006.13346@Solbourne.COM>
Reply-To: uunet!dg!rec (Robert Cousins)
Organization: Data General, Westboro, MA.
Lines: 34

In article <1989Nov8.185006.13346@Solbourne.COM> stevec@momma.UUCP (Steve Cox) writes:
>In article <1015@maxim.erbe.se> prc@erbe.se (Robert Claeson) writes:
>>Which brings up another question -- which RISC chip is the best one to
>>build a shared-memory parallel machine around?
>the m88k of course!  8-)
>what other risc chips (sets) where designed from the outset with shared
>memory multiprocessing as a system parameter?
>at least the m88k wins for simplicity of hardware design.

Actually, our experiences with the 88K have been quite positive.  The 88K
supports both 'private' and 'global' data transactions on the bus, a burst mode
bus and the standard MP features (cache coherency and interlocked bus operations).
However it is important to remember that any Harvard architecture machine with
independent caches has many of the characteristics of a multiprocessor machine.

The bottom line is that the 88K has been successfully used in a number of multiprocessor
machines, that there exists generally available MP operating systems which are
compliant with the Binary Compatibility Standard and that these machines have
been shipping for (in computer terms) a long time now.

>- stevec
>
>-- 
>--------------------------------------------------------------------------------
>steve cox
>solbourne computer, inc.
>1900 pike, longmont, co			GO BUFFS !!!


Robert Cousins
Dept. Mgr, Workstation Dev't.
Data General Corp.

Speaking for myself alone.