Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!sharkey!atanasoff!hascall From: hascall@atanasoff.cs.iastate.edu (John Hascall) Newsgroups: comp.arch Subject: Re: 80-20 Summary: How hard can it be? Message-ID: <1925@atanasoff.cs.iastate.edu> Date: 11 Nov 89 17:26:59 GMT References: <6927@pt.cs.cmu.edu> Reply-To: hascall@atanasoff.UUCP (John Hascall) Organization: Iowa State Univ. Computation Center Lines: 42 In article lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay) writes: }From the press: }"...Digital's engineers isolated the core VAX instruction set, }including 80% of the most used opcodes and optimized it to the VAX }9000 gate structure. The conversion didn't involve reducing - or }RISCing - the instruction set but more accurately hardwiring it into }a single-cycle instruction set. ... The other 20% of complex }instructions execute with microcode as always..." }If DEC would document exactly what's in that 80%, then VAX compiler }writers could FINALLY settle the subject of choosing between }different instruction sequences. How hard can it be to figure out? Write a simple loop: MOVL #BIGNUM,R0 10$: ; repeat instruction under test, . ; say, 100 times : SOBGTR R0,10$ Anyway, looking at the VAX Arch. Handbook (Chap 10) we find: 304 instructions (unless they've added some) 304 * 0.80 = 243 (approx.) We can probably assume that most of the "Kernel Instruction Set" (those instruction required in any implementation--may not be emulated) are hardcoded. That's 175 instructions instructions (less MOVC3, MOVC5, LDPCTX, PROBER, PROBEW, REI, SVPCTX, INDEX, POPR, PUSHR, XFC, CALLS, CALLG, RET, 6 queue instructions and 7 bitfield instructions) giving 148. Then there are 102 FP instructions (less ACBx (4), POLYx (4) and EMODx (4)) giving 90. 148 Kernel + 90 FP = 238 instructions (or 78%). I would suspect I'm not off by more than a handfull of instructions in either direction. John Hascall