Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!purdue!tut.cis.ohio-state.edu!bloom-beacon!eru!luth!sunic!bmc!kuling!irf
From: irf@kuling.UUCP (Bo Thide')
Newsgroups: comp.arch
Subject: Re: RISC multiprocessors
Keywords: RISC,multiprocessors,parallel
Message-ID: <1236@kuling.UUCP>
Date: 12 Nov 89 01:27:45 GMT
References: <13319@pur-ee.UUCP> <1012@maxim.erbe.se> <516@baird.cs.strath.ac.uk>
Reply-To: irf@kuling.UUCP (Bo Thide')
Organization: Dept. of Computer Systems, Uppsala University, Sweden
Lines: 29

In article <516@baird.cs.strath.ac.uk> jim@cs.strath.ac.uk writes:
>In article <1012@maxim.erbe.se> prc@erbe.se (Robert Claeson) writes:
>>In article <13319@pur-ee.UUCP> csh@pur-ee.UUCP (Craig S Hughes) writes:

[text deleted]

>A RISC based multiprocessor machine would be an exciting prospect, but
>is likely to be difficult and expensive to build. If it used the same

[text deleted]

Hewlett-Packard has announced that they will introduce a multi HP-PA
(RISC) processor HP9000 machine during 1990 and that this is the reason they
will not provide a pure OSF/1, but rather make HP-UX OSF/1 compliant.
OSF multiprocessor support will not be present until OSF/2 (by utilising
MACH?).  With this capability and the Hitachi CMOS (?) HP-PA processor
they say that they are aiming at 400 MIPS for their top level workstations.
This is a very bold statement and I am really curious to hear more about
the details.  Anybody from HP, or anyone else, who would care to comment
on this?

Bo

   ^   Bo Thide'--------------------------------------------------------------
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