Path: utzoo!censor!geac!jtsv16!uunet!samsung!usc!apple!baum From: baum@Apple.COM (Allen J. Baum) Newsgroups: comp.arch Subject: Re: RISC vs CISC (rational discussion..) + new IBM 'beyond RISC' Message-ID: <36365@apple.Apple.COM> Date: 10 Nov 89 18:41:16 GMT Reply-To: baum@apple.UUCP (Allen Baum) Organization: Apple Computer, Inc. Lines: 28 [] >In article <31149@winchester.mips.COM> mash@mips.COM (John Mashey) writes: > In article Allen Baum says: >>Ah, yes. I think its safe to say that our simple RISCs are going to start to >>get fairly complex, as we start to play all the little hardware tricks we've >>known from the supercomputer world, and some that we'll invent. Note that a >>lot of errors come from exception handling kinds of problems, and while CISC >>machines have them, superscalar, out-of-order execution RISC machines will >>have them in spades. >Yes, but superscalar, out-of-order CISCs would have them in spades&hearts :-) > >The new IBM stuff looks interesting.... I guess what I was trying to say is that I think its possible to have an architecute that we might today consider "CISC" (for any number of reasons: Reg-Mem instructions, 2 word instructions, fancier address modes, etc.) that would be architected (I hate verbing nouns) to permit superscalar and out-of- order execution, unlike current CISCs that gave no thought to the issues at all (but I love run-on sentences). This being the case, I believe that compiler technology can take advantage of CISCy features, and that we'll see a resurgence of CISCs. But, they won't be compatible with the ones we are familiar with. -- baum@apple.com (408)974-3385 {decwrl,hplabs}!amdahl!apple!baum