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From: mslater@cup.portal.com (Michael Z Slater)
Newsgroups: comp.sys.m68k
Subject: Re: Performance stats for MC68040?
Message-ID: <23948@cup.portal.com>
Date: 12 Nov 89 04:35:05 GMT
References: <1989Nov5.222513.1572@sdsu.edu> <2890@jarthur.Claremont.EDU>
Distribution: na
Organization: The Portal System (TM)
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>Can anyone clue me in to the differences between the MC68040 and the
>MC68030?  Is there an on-chip math coprocessor on the 040?  What about cache 
>types and sizes, deeper or more parallel pipelining, new addressing modes,
>new instructions, new registers, etc.?  Finally, what clock speeds will this 
>beast be available in?

Moto has not yet formally introduced the 040, and has not given any performance
data, other than to say it is more than 2x the 030 (and faster than the 486).

It has two 4K caches, an on-chip FPU, and more pipelining.  Many simple
instructions execute in 1 clock.  Clock speeds have not been disclosed.
There is only one new instruction, a memory-to-memory block move, that
is a supervisor mode instruction.  No new user-mode instructions, no new
addressing modes.

Michael Slater, Microprocessor Report  mslater@cup.portal.com
550 California Ave., Suite 320, Palo Alto, CA 94306  415/494-2677