Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!gem.mps.ohio-state.edu!usc!orion.oac.uci.edu!uci-ics!rfg From: rfg@ics.uci.edu (Ron Guilmette) Newsgroups: comp.sys.m88k Subject: SERIALIZATION bit (was Re: WELCOME to comp.sys.m88k) Keywords: 88000 Message-ID: <1989Nov12.173826.19296@paris.ics.uci.edu> Date: 13 Nov 89 01:38:26 GMT References: <223@m1.UUCP> Reply-To: Ron Guilmette Organization: University of California, Irvine - Dept of ICS Lines: 27 In article <223@m1.UUCP> dave@m1.UUCP (Dave Cline) writes: > >WELCOME: to comp.sys.m88k > > >Here are some proposed topics (partial list) to be covered by this group: > > g) Future forthcoming standards activities (e.g. 88k ABI for V.4, etc.) Ok. I'll bite. Is there (or will there be) an ABI for SysV.4? >2) Discussions of the 88k architecture > a) Programming tricks OK. Here is a harder one. I noticed in the 88100 hardware manual that there is a control bit (in one of the control registers) that is said to be the "SERIALIZATION" bit. The manual (cryptically) sez that setting this bit "serializes" the processor. This terse note then sez to "see section so-and-so for further information". Well, I looked in section "so-and-so" (sorry, I don't have the book right here just now) and guess what! There is *no mention* of the serialization bit in there! What gives? What I *really* want to know (besides *all* of the details) is whether or not this bit could be useful to debuggers (i.e. does it disable the otherwise confusing effects of pipelining).