Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!usc!gem.mps.ohio-state.edu!uakari.primate.wisc.edu!uwm.edu!ux1.cso.uiuc.edu!tank!ncar!boulder!grunwald From: grunwald@foobar.colorado.edu (Dirk Grunwald) Newsgroups: gnu.gcc.bug Subject: Re: "funny" gcc output for mips Message-ID: <13789@boulder.Colorado.EDU> Date: 12 Nov 89 18:29:43 GMT References: Sender: news@boulder.Colorado.EDU Reply-To: grunwald@foobar.colorado.edu Distribution: gnu Organization: University of Colorado at Boulder Lines: 14 In-reply-to: ham@Neon.Stanford.EDU's message of 12 Nov 89 17:50:25 GMT The MIPS CC simply records this as a constant offset in the assembled output. However, if you want to use alloca, this doesn't always work, because you don't know what value SP has at the end of the fcn, unless you use: + use a malloc-based alloca + stack-copy alloca + maintain an FP. However, it would appear that the MIPS backend could be changed to assume that you're either using one of these things. It *does* give you an temp. register.