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From: nelson@m.cs.uiuc.edu
Newsgroups: comp.arch
Subject: Re: ATTACK OF KILLER MICROS (Actual
Message-ID: <3300083@m.cs.uiuc.edu>
Date: 19 Nov 89 16:43:00 GMT
References: <221@dg.dg.com>
Lines: 19
Nf-ID: #R:dg.dg.com:221:m.cs.uiuc.edu:3300083:000:924
Nf-From: m.cs.uiuc.edu!nelson    Nov 19 10:43:00 1989


> parallelism to continue to deliver more performance.  If you project the
> slope of the clock rates of supercomputers, you will see sub-nanosecond
> CYCLE times before 1995.  I don't see any technologies in the wings which
> promise to allow this to continue...

Actually, I don't see this (dare I say it) EVER occuring.  Ignoring
  delay due to capacitance, a nanosecond is only 12 inches of wire --
  and I'm reasonably sure that the "critical path" length is at least
  on the order of a foot (does anyone know?).  Once capacitance delay
  comes into the picture (even on-chip there is a significant amount),
  even with new technologies, that 12 inches is being reduced at least
  a tenfold (opinion/guess).  That leaves you with an inch of wiring
  for the critical path for this super technology -- that does not
  seem nearly enough to build a nano-processor around. 

Anyone else have Opinions?  Facts?

-- Taed.