Path: utzoo!mnetor!tmsoft!torsqnt!jarvis.csri.toronto.edu!rutgers!iuvax!watmath!watserv1!pfratar From: pfratar@watserv1.waterloo.edu (Paul Frattaroli - DCS) Newsgroups: comp.binaries.ibm.pc.d Subject: Re: RISC vs CISC Message-ID: <160@watserv1.waterloo.edu> Date: 17 Nov 89 14:40:33 GMT References: <29806@iuvax.cs.indiana.edu> Reply-To: pfratar@watserv1.waterloo.edu (Paul Frattaroli - DCS) Distribution: comp.binaries.ibm.pc.d Organization: U. of Waterloo, Ontario Lines: 56 In article <29806@iuvax.cs.indiana.edu> sl179060@silver.bacs.indiana.edu (Chima Echeruo) writes: > >I have an IBM AT clone (@ 20Mhz) and sometimes it seems that it is no faster >than an AT (@12Mhz). Most of the bottlenecks seemed to be the disk IO and >the graphics card (8 bit EGA). I expected the 20 Mhz 286 to average 8+ MIPS and Yes. Choice of hard disk and controller can make a big difference in overall performance. But, 8 MIPS is a bit extravagent for a 286 based machine >when I ran the MIPS (Chips & Tech) benchmark, I got a disappointing 2.5 - 3.00 That sounds about right. >MIPS. Does that mean that the 'average' 286 instruction takes 8 cycles? > >The Acorn Archimedes A310 (a RISC computer) has a clock rate of 8Mhz yet it >is capable of 4 MIPS. I have been told that the higher the clock rate, the more >expensive the hardware (eg. 33 Mhz 386 vs 16 Mhz). If this is so why does INTEL >keep raising the clock speeds on their chips? Would it not be cheaper and more >efficient to modify their chips to make use of the RISC technology? Probably not, from INTEL's standpoint. In my opinion, INTEL is a company that grew up with the IBM PC. Everyone and their dog makes microprocessors but INTEL made them for the IBM PC. The problem is that RISC and CISC are in most cases incompatible. The idea of RISC is to reduce the instruction set of the cpu ( hence the name ) and thus the complexity. So, if INTEL were to make a RISC version of the 8086 for instance, by cutting down the instruction set to the bare bones, it would not be able to run many of the software packages available for the PC today. Those that make use of the instructions that get canned. This is however an extreme example. But INTEL would be looking at losing the PC market, for at least that chip. But, once the complexity is reduced, things such as built in coprocessors and hardware implemented double precision square roots can be integrated inside the chip itself, instead of outside. This has happened to the 486 to some extent. Although not truly RISC, the 486 is a more efficient 386 with a built in 387 coprocessor and some built in instruction cache ( about 2k I think ) > >Would the RISC 286 (@10 Mhz) not outperform the CISC 286 (@20)? What are the >factors involved in the decision to make a chip RISC or CISC? >----- >Chima >----- Of course, RISC and CISC are relative, and they lack formal definitions. If you look at the DIGITAL PDP-8 for example, ( or is it 7? ), it only had maybe a dozen instructions of any consequence. By todays standards, that is superRISC... ....Paul F -- Paul Frattaroli - Department of Computing Services University of Waterloo Waterloo, Ontario Canada N2L-3G1 < pfratar@watshine.UWaterloo.ca > < pfratar@watserv1.UWaterloo.ca > < pfratar@watdcs.bitnet > -------------------------------------------------------------------------------- "My friend Paco, there are two types of people in this world, those with loaded guns, and those who dig. You dig." - Blondie [ Clint Eastwood ], The Good, the Bad and the Ugly.