Path: utzoo!attcan!uunet!aplcen!uakari.primate.wisc.edu!ames!amdahl!rtech!mikes@rtech.UUCP
From: mikes@rtech.UUCP (Mike Schilling(This sentence no verb.))
Newsgroups: comp.lang.c
Subject: Re: PDP-11 data and function address spaces
Message-ID: <4103@rtech.rtech.com>
Date: 18 Nov 89 19:37:28 GMT
References: <6989@ficc.uu.net>
Sender: news@rtech.rtech.com
Lines: 18

From article <6989@ficc.uu.net>, by peter@ficc.uu.net (Peter da Silva):
> In article <1989Nov15.165806.21515@utzoo.uucp> henry@utzoo.uucp (Henry Spencer) writes:
>> In article <6958@ficc.uu.net> peter@ficc.uu.net (Peter da Silva) writes:
>> >I think the 11/24 did, too. Or maybe I'm thinking of the 11/23+?
> 
>> No.  Neither had split-space.
> 
> I'm pretty sure the LSI-11/23+ did. Or are you differentiating between the
> LSI-11 and PDP-11.
No, it's a function of the processor type.  J-11 machines (11/73, 11/84, etc.)
have 6 sets of mapping registers: separate I and D space in user, supervisor,
and kernel mode.  F-11 machines (11/23, 11/73, 11/23, micro-pdp11, etc.)
have only 2: user and kernel.  Some of the larger machines (11/70, 11/44, etc.)
also have 6.

What the 23+ DOES have are Unibus Mapping Registers (UMRs).  These map from
18-bit Unibus addresses to 22-bit memory addresses, and are only of interest to
device-driver writers.