Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!iuvax!ux1.cso.uiuc.edu!ux1.cso.uiuc.edu!uxa.cso.uiuc.edu!uxf.cso.uiuc.edu!rjk752
From: rjk752@uxf.cso.uiuc.edu
Newsgroups: comp.sys.atari.st
Subject: Re: atari ABC  yea or nay  ????
Message-ID: <46300080@uxf.cso.uiuc.edu>
Date: 23 Nov 89 01:33:00 GMT
References: <3353@vax1.tcd.ie>
Lines: 59
Nf-ID: #R:vax1.tcd.ie:3353:uxf.cso.uiuc.edu:46300080:000:3612
Nf-From: uxf.cso.uiuc.edu!rjk752    Nov 22 19:33:00 1989



	If you don't care about 68000 architecture skip this ....
	This is an excerpt from some mail I got about my offhand comment
to the effect that the 68000 was a RISC chip at heart.  I found it to be
interesting and thought that an addition to this notestring involving something
other than Atari-bashing wouldn't hurt.  So I decided to post it.  I think
the author sent it E-mail to avoid embarrassing me, but I didn't include his
name in case he's bashful or something.  Maybe he will take credit for it if
he see's it, in case somebody wants to know something more about this subject.
	I also felt compelled to post it because I was wrong about the 68000
being RISC, and I would hate to think I had left somebody confused because
of my lack of 68000 experience.  I know it's very frustrating for me when 
people give information involving things they know little about.  I hope this
fixes it.  I guess the moral is to use information you read or learn yourself,
not what your hear from co-workers or friends.  This guy has some
experience, so I think it's likely to be valid.  My thanks to the author for
responding with intellect and good manners to my mistake.
	Note that I still don't claim any 68000 experience and I didn't write
this.  For that reason, any flames sent will most likely be re-routed to
/dev/null without much parsing.

Note: Timo said (correctly) that the 68000 is much more CISC that RISC.

****************  Here's the 68000 info ************************
I happen to be an undergraduate in Computer Science with a strong background
in Electrical Engineering.  From my independent research into the subject and
class work on the subject, I have to agree more with Timo.

The RISC archetecture inside of a 68000 that you speak of is the microcode
processor.  While it is a very simplistic language to work in, you definately
do not want to program in it.  It deals with basic dataflow within the
processor between registers, ALU and memory access ports.  On the 68000 and
the 8086, the microcode in tucked away within the chip and is not accessible.
However, this is not always the case, the VAX processor is most definately a
CISC processor, but the first thing it does when it boots is load the
micro-code into its internal memory.

But even micro-code can be hairy.  Often, the simplest and most effective
method to create a microcode is to use one bit per register and other parts
of the logic.  The whole string of bits could conceivably be longer than the
instructions of the processor itself.  In fact, a micro-code which is larger
than the "machine code" is not infrequent in the world of processor design.

But this is all beside the point.  The designations of RISC and CISC refer to
its outward construction.  The microcode does not enter into the picture
making this determination.  In fact some argue that micro-coded processors
are not really RISC.  Never-the-less, an example of a RISC design would be
the transputer processors from Inmos.  While they are micro-coded, they have
a very reduced instruction set.  Every instruction fits into a single byte!
The processor has only 3 (or some small number of) registers.  In comparison,
the 68000 encodes all command within a single word (32 bits).  There are
considerably more instructions which may be encoded in 32 bits for 16
registers total.  From this, we conclude that the 68000 is not a RISC
processor.  The 8086 is even worse.  Based on an old 8bit processor, the 8086
remains totally compatible with the older design.  The design of the
instruction set for the 8086 is, as a result, a big mess.

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