Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!gem.mps.ohio-state.edu!usc!samsung!uunet!crdgw1!crdos1!davidsen From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) Newsgroups: comp.sys.ibm.pc Subject: Re: .84 usec Timer resolution on PC Message-ID: <1757@crdos1.crd.ge.COM> Date: 22 Nov 89 14:17:31 GMT References: <25235@sequent.UUCP> Reply-To: davidsen@crdos1.UUCP (bill davidsen) Distribution: usa Organization: GE Corp R&D Center, Schenectady NY Lines: 24 In article <25235@sequent.UUCP> norsk@sequent.UUCP (Doug Thompson) writes: | To program Timer 0 to Mode 2 do the following: | | mov al, 34h ; Timer 0 - Mode 2 | out 43h, al | xor al, al ; Get ZERO to give full count of 65536 | jmp $+2 | out 40h, al ; load low order byte | jmp $+2 | out 40h, al ; hi order byte Could you explain the "jmp $+2" instructions? I mean, I know what they do, but not why you're doing it. If this is supposed to be a software delay (a) comments are nice and (b) sad experience tells me that fast cpus will need more delay than slow cpus. A little clarification, please, as to the intent? Also the "jmp $+1" in the second part? -- bill davidsen (davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen) "The world is filled with fools. They blindly follow their so-called 'reason' in the face of the church and common sense. Any fool can see that the world is flat!" - anon