Path: utzoo!attcan!uunet!snorkelwacker!apple!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.sys.m88k Subject: Re: Register Allocation (was Re: Info about 88open & standards) Message-ID: <31783@winchester.mips.COM> Date: 20 Nov 89 22:57:00 GMT References: <1948@psueea.UUCP> <1989Nov14.175806.23483@paris.ics.uci.edu> <5063@tekcrl.LABS.TEK.COM> <2631@yogi.oakhill.UUCP> <1989Nov16.212149.9770@paris.ics.uci.edu> <2647@bushwood.oakhill.UUCP> Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Inc. Lines: 25 In article <2647@bushwood.oakhill.UUCP> oakhill!bushwood!phillip@cs.utexas.edu (Mike Phillip) writes: >In article <1989Nov16.212149.9770@paris.ics.uci.edu> Ron Guilmette writes: >> >>My original question was "Why should the caller save *any* of his live >>registers when he has absolutely no knowledge of whether or not *any* of >>them will be used (i.e. clobbered) in the called routine?" >Yes, the inclusion of both caller and callee save registers is a >compromise... always has been, and probably always will... > >I disagree, however, that the compromise is in place to mask compiler >deficiencies or that it hinders the development of state-of-the-art >optimizing compilers. (And yes, I know, the Moto compilers can use >improvement :^) In defense of Mr. Phillip, both HP PA and MIPS R3000s split the integer registers in approximately the same ratio as does the 88K, from looking at program statistics. Allocation behavior for integer programs, given similar compiler technology, should not be too different. (For floating-point, may not be true, as both HP PA and MIPS have a separateset of FP registers). -- -john mashey DISCLAIMER: UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086