Path: utzoo!attcan!uunet!wuarchive!mailrus!tut.cis.ohio-state.edu!pt.cs.cmu.edu!andrew.cmu.edu!zs01+
From: zs01+@andrew.cmu.edu (Zalman Stern)
Newsgroups: comp.sys.mips
Subject: Re: ls -A and the MIPS
Message-ID: <4ZPTlVy00UknQOmshh@andrew.cmu.edu>
Date: 25 Nov 89 02:43:45 GMT
References: <14057@boulder.Colorado.EDU> <14101@boulder.Colorado.EDU> <14134@boulder.Colorado.EDU>,
	<31898@orac.mips.COM>
Organization: Information Technology Center, Carnegie Mellon, Pittsburgh, PA
Lines: 20
In-Reply-To: <31898@orac.mips.COM>

Here's what it took to get cache flushing under Ultrix 3.1 on a DECstation
3100:

#ifdef ultrix
    if (cacheflush(e->text, e->totalsize, BCACHE) != 0) {
#else
/* Ultrix 3.1 does not have cacheflush in libc.a, however, the kernel on my
 * machine implements it and it is needed to make doindex work...
 */
#include <sys/syscall.h>
#include <sys/sysmips.h>

    if (syscall(SYS_sysmips, MIPS_CACHEFLUSH, e->text, e->totalsize,
                BCACHE, 0) == -1) {
#endif

Sincerely,
Zalman Stern
Internet: zs01+@andrew.cmu.edu     Usenet: I'm soooo confused...
Information Technology Center, Carnegie Mellon, Pittsburgh, PA 15213-3890