Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cs.utexas.edu!samsung!uunet!sco!seanf
From: seanf@sco.COM (Sean Fagan)
Newsgroups: comp.arch
Subject: Re: I/O, I/O, and off to work I go...
Message-ID: <3899@scolex.sco.COM>
Date: 24 Nov 89 23:19:31 GMT
References: <1128@m3.mfci.UUCP> <1989Nov22.175128.24910@ico.isc.com> <3893@scolex.sco.COM> <1989Nov24.033516.16214@world.std.com>
Reply-To: seanf@sco.COM (Sean Fagan)
Distribution: usa
Organization: The Santa Cruz Operation, Inc.
Lines: 17

In article <1989Nov24.033516.16214@world.std.com> bzs@world.std.com (Barry Shein) writes:
>Or is I/O performance in micros like the weather, everyone talks about
>it but no one does anything about it? NeXT made a lot of noise about
>"mainframe I/O performance", but I had one of those systems for a
>while and I didn't see anything impressive in their disk performance.

Well, NeXT *does* have the right idea, almost.  They have chips to offload
some of the work from the CPU (the DSP and the I/O controllers).  However,
the bus doesn't seem to allow the DMA to happen at the same time the CPU
wants memory.  That is, somebody loses cycles.  It might be possible to get
around this, but I don't know enough about the machine to speculate too much
(anybody from NeXT reading this?).

-- 
Sean Eric Fagan  | "Time has little to do with infinity and jelly donuts."
seanf@sco.COM    |    -- Thomas Magnum (Tom Selleck), _Magnum, P.I._
(408) 458-1422   | Any opinions expressed are my own, not my employers'.


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