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From: dhepner@hpisod2.HP.COM (Dan Hepner)
Newsgroups: comp.arch
Subject: Coherent cache for Killer Micros
Message-ID: <13910002@hpisod2.HP.COM>
Date: 28 Nov 89 19:29:06 GMT
Organization: Hewlett Packard, Cupertino
Lines: 11

From: brooks@maddog.llnl.gov (Eugene Brooks)
>A real computer will have handful of Killer Micros hooked
>up to a coherent cache system

>A supercomputer will have a scalable
>coherent cache system 

Is a coherent cache system essential or just nice?  And why?

Thanks,
Dan Hepner  


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