Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!samsung!think!ames!attctc!linimon
From: linimon@attctc.Dallas.TX.US (Mark Linimon)
Newsgroups: comp.arch
Subject: Re: VME Bus Standard
Summary: alignment
Message-ID: <10425@attctc.Dallas.TX.US>
Date: 1 Dec 89 05:34:00 GMT
References: <112400007@uxa.cso.uiuc.edu> <11759@phoenix.Princeton.EDU> <3070@cello.UUCP>
Reply-To: linimon@attctc.Dallas.TX.US (Mark Linimon)
Followup-To: comp.arch
Distribution: na
Organization: The Unix(R) Connection BBS, Dallas, Tx
Lines: 15

In article <3070@cello.UUCP> alvitar@weasel.austin.ibm.com (Phillip L. Harbison) writes:
>Of course the shuffle network has to be implemented somewhere, but why
>not do it on the CPU card? Most modern micros implement this on the chip
>anyway.  (at the the 68020, 68030, 88200, 386, and probably many more)

Note that at least one of the RISC designs does _not_, many other may not
as well.  I will agree, however, that this is one area where one might
reasonably expect an MPU to perform this function, given its inefficient
implementation otherwise.

Mark Linimon
Mizar, Inc.
linimon@mizarvme

disclaimer: Mizar neithers knows nor cares that I have opinions.


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