Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!brutus.cs.uiuc.edu!apple!voder!parns!atul
From: atul@parns.nsc.com (Atul)
Newsgroups: comp.lsi
Subject: Modeling SnapBack characteristics for Circuit Simulation
Message-ID: <171@snappy.nsc.com>
Date: 4 Dec 89 19:42:26 GMT
Reply-To: atul@snappy.UUCP (Atul)
Organization: National Semiconductor, Santa Clara
Lines: 14



     Has anyone  modeled  snapback characterisics, 
say for junction breakdown and successfully used them
in circuit simulation ? We would like to do this for
modeling ESD devices. Would appreciate any information 
and pointers.

atul
-- 
*********************************************************************
     Atul P. Agarwal          |
National Semiconductor Corp., |  What is this life if full of care ?
   atul@parns.nsc.com         |  We have no time to stand and stare.


Brought to you by Super Global Mega Corp .com