Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!shadooby!samsung!uunet!crdgw1!vdsvax!trub
From: perley@trub (Donald P Perley)
Newsgroups: comp.sys.amiga.tech
Subject: 2090 fix? was dma/non-dma
Message-ID: <10282@vdsvax.crd.ge.com>
Date: 28 Nov 89 21:46:41 GMT
References: <8911150430.AA24506@jade.berkeley.edu> <8580@cbmvax.UUCP>
Sender: news@vdsvax.crd.ge.com
Reply-To: perley@trub.crd.ge.com (Donald P Perley)
Organization: GE Corp. R & D, Schenectady, NY 12345
Lines: 16
In-reply-to: daveh@cbmvax.UUCP (Dave Haynie)

In article <8580@cbmvax.UUCP>, daveh@cbmvax (Dave Haynie) writes:
>>> <article about gvp's buffer memory, 2091 flow control, and 
       2090, which overflows 64 byte fifo during overscan>

Does the 2090 have any hard coded knowledge of the 64 byte length of
the fifo, or just use full, empty, and maybe "nearly full" signals
from the fifo itself?

Would it be possible to stick in a larger fifo or daughter board that
would hold a whole block?

-don perley



perley@trub.crd.ge.com