Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!tut.cis.ohio-state.edu!ucbvax!UREGINA1.BITNET!GORRIEDE
From: GORRIEDE@UREGINA1.BITNET (Dennis Robert Gorrie)
Newsgroups: comp.sys.amiga.tech
Subject: Re: Questions about Harddisks
Message-ID: <8911300328.AA02859@jade.berkeley.edu>
Date: 30 Nov 89 00:43:25 GMT
References: <keithh@atreus.uucp>
Sender: daemon@ucbvax.BERKELEY.EDU
Lines: 28


I can understand you predicament well.  The advertizing realy does confuse
the whole matter of DMA vs Non-DMA.  Supposed benchmarks confuse the matter
even more.

No member of this newsgroup has currently submitted enough information about
this matter for anyone to gain a clear understanding of it.  There has not
been an overwhelming about of factual info about it at any rate.

I've posted this twice before, but maybe this time there will be some response.

How about a step by step explanation of DMA vs NON-DMA transfer, showing:
1)Under what conditions is there contention for chip RAM, for both DMA and
  Non-DMA.
2)Why is there contention for chip RAM? Why is access to chip RAM neccessary?
3)What are the solutions used in a209x, hardframe, and cltd controlers
  to get around the problem of chip ram contention?
  What are the resulting speeds (using same drive/mountlist)?
4) where are the device registers and buffers from DMA and NON-DMA devices?
   Where excactly are they located?  What restricts them from being accessed
   on every cycle?  What limits do they have in the size and speed of their
   transfers?


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|Dennis Gorrie                 'Chain-Saw Tag...                        |
|GORRIEDE AT UREGINA1.BITNET                    Try It, You'll Like It!'|
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