Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uakari.primate.wisc.edu!brutus.cs.uiuc.edu!wuarchive!emory!ogccse!sparky!overby From: overby@sparky.UUCP (Glen Overby) Newsgroups: comp.sys.m68k Subject: Re: Remapping EPROM Summary: Godbout CPU 68K summary Message-ID: <2909@sparky.UUCP> Date: 4 Nov 89 23:00:47 GMT References: <820@carroll1.UUCP> Reply-To: overby@sparky.UUCP (Glen Overby) Distribution: usa Organization: North Dakota State University, Fargo Lines: 19 In article <820@carroll1.UUCP> dnewton@carroll1.cc.edu (Dave 'Post No Nicknames' Newton) writes: > I've seen a number of systems using the 68000 that start off with EPROM/PROM >mapped to 0000 (low mem) and then after the startup code is executed it's >moved to high mem to allow sticking in vector pointers. How is this remapping >done? I don't have the time to figure it out myself, so I thought I'd ask >netland. I have a Godbout CPU 68K, and it has an option to make it's on-board ROMs echo through all memory until the first write. They have PALs doing most of the work on the board so all the details aren't available, but they use something like a JK flip-flop to force the ROMs selected and everything else (the bus) ignored until the WR strobe from the 68K restes the FF. A TTL equivalent would probably have a flip-flop whose output would disable an address decoder while in it's post-CPU-reset state, and the output of the decoder's ROM select ORed with the J-K FF to form the ROM CS. -- Glen Overby uunet!ndsuvax!ncoverby (UUCP) ncoverby@ndsuvax (Bitnet)