Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uakari.primate.wisc.edu!xanth!mcnc!rti!xyzzy!meissner From: meissner@dg-rtp.dg.com (Michael Meissner) Newsgroups: comp.sys.m88k Subject: Re: Register Allocation (was Re: Info about 88open & standards) Message-ID: Date: 29 Nov 89 20:43:58 GMT References: <1989Nov16.212149.9770@paris.ics.uci.edu> <100050002@hpcuhc.HP.COM> Sender: usenet@xyzzy.UUCP Organization: Data General (Languages @ Research Triangle Park, NC.) Lines: 30 In-reply-to: thomas@uplog.se's message of 28 Nov 89 09:05:12 GMT In article thomas@uplog.se (Thomas Hameenaho) writes: | I have followed the debate about caller vs. callee saves registers with | great interest. | | I have an idea that perhaps could be a bit of both worlds: What about having | the caller supply a mask of live registers to the callee, ie. registers that | must not be clobbered to the callee? This mask should be ANDed with a mask of | the registers that the callee clobbers and handed to the equivalent of MOVEM | (68k) or CALLx (VAX). The save/restore should of course be handled by | microcode/hardware to make it fast. | This way there would never be unnecessary saves. Given that the machine is a RISC machine, it only has simple loads and stores. In order to implement the above scheme, some sort of load and/or conditional branches would have to be done, which would be an expensive operation. In general, the time taken to do the prologue stores is 1 cycle per register, and 1 cycle for the epilogue loads (yes I know that loads take 3 cycles if coming from the cache, but in most epilogues, you will have a lot of loads in a row, whose value is not needed immediately, so the loads will be pipelined). Assuming the procedure in question is not a monster procedure, and it does not invoke other large procedures, it is likely that the values being saved will still be in the cache when it comes time to load them again. -- Michael Meissner, Data General. Until 12/15: meissner@dg-rtp.DG.COM After 12/15: meissner@osf.org