Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!tut.cis.ohio-state.edu!ucbvax!EMBL.BITNET!STORZ
From: STORZ@EMBL.BITNET
Newsgroups: comp.sys.transputer
Subject: Re: H1 transputer: Code compatible?!?
Message-ID: <8911282053.AA06866@tcgould.TN.CORNELL.EDU>
Date: 28 Nov 89 18:43:00 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Organization: The Internet
Lines: 27


In article <8911281522.AA26703@tcgould.TN.CORNELL.EDU>, Klaus Kusche <K312240%AE
   ARN.BITNET@tcgould.TN.CORNELL.EDU> writes:
>
> The only definite (printed and Inmos-authored) information I've ever
> seen about the new H1 transputer appears in the SERC/DTI Mailshot,
> issue November 1989, page 10.

The information I have read (SGS-Thomson-Cheft Pistorio) announced
the H1 as
      - full command compatible to t4/t8 transputers (???)
      - 100 MIPS/20 MFlops
      - at least 18 months from now
      - fighting for the embedded market

Anywhere else I have read  (sounds like ideas, not yet fixed)
        - virtual links (routing in hardware)
        - internal RAM (used like before or switched as fast CACHE)
        - commands for fast 'standard' languages like C
        - (perhaps MMU ???)

Somewhere else I heard about 6 links ?

No garanty for that informations.

Clemens Storz
EMBL Heidelberg