Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!wuarchive!kuhub.cc.ukans.edu!zeus!dicao
From: dicao@zeus.unl.edu
Newsgroups: comp.graphics
Subject: Re: Graphic Controller chips!
Message-ID: <5574.257ac8b3@zeus.unl.edu>
Date: 5 Dec 89 01:42:43 GMT
References: <1414@utkcs2.cs.utk.edu> <1989Dec2.064330.25821@bpdsun1.uucp>
Lines: 32

In article <1989Dec2.064330.25821@bpdsun1.uucp>, rmf@bpdsun1.uucp (Rob Finley) writes:
> In article <1414@utkcs2.cs.utk.edu> mueller@alphard.cs.utk.edu (Carl Mueller) writes:
>>I have a pressing need to find out all there is to know about the
>>following graphic controller chips:
>>    TI 34010 and 34020
>>    IBM 8514/A
> 
> -----
> Rob
> 	quintro!bpdsun1!rmf@lll-winken.llnl.gov
> 	uunet!tiamat!quintro!bpdsun1!rmf

	I happen to design my senior project, a graphics system, using TMS 34010
, I have been working with this chip for about half a year.  I don't know what 
exactly you want to know. I briefly write down what I have known.   
	TI provide a series of software and hardware development tools for 
TMS 34010, including a Software Development Board, a hardware Emulator, C 
compiler, Assembler, Linker, Graphics/maths extended object libary.  
	TMS 34010 is a general purpose processor with special hardware to 
handle the graphics operations.  A number of instructions are dedicated to 
graphics operations, for example, LINE 0 is an instruction to draw lines.  
The processor can directly interface with DRAM and VRAM, without external 
controllers.  With 16-bit external / 32-bit internal bus, it can access up to 
128 mega byte memory.
	If you are insterested in the processor, send E-mail to my account 
via bitnet, maybe I can help. 

					
				L.L. 

bitnet address: 
	dicao@unoma1