Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!samsung!think!mintaka!mit-eddie!snorkelwacker!spdcc!merk!xylogics!cloud9!jjmhome!m2c!wpi!dseah From: dseah@wpi.wpi.edu (David I Seah) Newsgroups: comp.sys.apple Subject: Need 64K of address space for IIGS hardware project Keywords: graphics buffer? Message-ID: <5983@wpi.wpi.edu> Date: 5 Dec 89 16:42:00 GMT Organization: Worcester Polytechnic Institute, Worcester, Mass. Lines: 26 I have been thinking of trying to do a graphics hardware project on my IIGS based on some stuff I've been doing in school. There is a chip called the TMS34070 Color Palette chip (from TI) that looks like it could emulate all IIGS superhires modes and beyond, including fill and scanline palettes. It also uses video RAM, so the graphics could even be fast! But where to put the frame buffer? I'd like to put it in its own 64K bank of memory. Is all the reserved space from bank $80 up sacred? I'm not interested in marketing the board, just grabbing some space to play with. I figured I could choose a bank somewhere in the reserved address space and decode for it off the address bus. Is there any inherent danger in attempting this? (other than ignoring the meaning of "Reserved", that is :) Or perhaps I could shadow writes to the existing SHR buffer@012000. As long as I have SHR shadowing turned off, all writes would be at full speed. This scheme would seem to be simpler than the previous one. (BTW, ignore that previous post in which I asked about gsRAM alleged ability to use 1 chip at a time. I imagine it could be done, with some kind of serial->parallel latch and a LOT of waiting around. But that would be silly, as someone pointed out) -- Dave Seah | O M N I D Y N E S Y S T E M S - M | Internet: dseah@wpi.wpi.edu | User Friendly Killing Machines | America Online: AFC DaveS