Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!sdsu!polyslo!vlsi3b15!batman!nicholaA
From: nicholaA@batman.moravian.EDU (Andy Nicholas)
Newsgroups: comp.sys.apple
Subject: Re: Speedy WDC Chips (was Re: Apple II
Message-ID: <675@batman.moravian.EDU>
Date: 8 Dec 89 13:25:56 GMT
References: <7803.infoapple.net@pro-generic>
Organization: Moravian College, Bethlehem, PA
Lines: 22

In article <7803.infoapple.net@pro-generic>, ericmcg@pro-generic.cts.COM (Eric Mcgillicuddy) writes:
> In-Reply-To: message from gem.mps.ohio-state.edu!brutus.cs.uiuc.edu!jarthur!polyslo!vlsi3b15!batman!nicholaA@tut.cis.ohio-state.edu

> Can you explain why 50ns DRAM is needed? the Mac+uses 100ns without wait
> states, why would a GS require twice as fast  with only 50% speed increase.
> Doesn't the IIci use 80ns with one wait state?

Nope, I can't.  Bill Mensch, the designer of the 65816 just said it in an RTC
on GEnie when the had him there... if you get the RTC transcript, you'll
find it in there.

Also, it seems to be correlated by Bill Heineman in that bill is getting 45ns
dram for the 9 Mhz twgs's he's souping up, so yes, it needs the faster dram
chips.  And, since when is going from 2.5 Mhz to 10 Mhz only a 50% speed
increase?  Sounds like at least a 200% speed increase to me... :-)

andy

-- 
Andy Nicholas             GEnie, AM-Online: shrinkit
Box 435, Moravian College       CompuServe: 70771,2615
Bethlehem, PA  18018              InterNET: shrinkit@moravian.edu